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INTEGRATED CIRCUITS
74LVT240 ABT octal inverting buffer (3-State)
Product specification Supersedes data of 1994 May 16 IC23 Data Handbook 1998 Feb 19
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
FEATURES
* Octal bus interface * 3-State buffers * Output capability: +64mA/-32mA * TTL input and output switching levels * Input and output interface capability to systems at 5V supply * Bus-hold data inputs eliminate the need for external pull-up * Power-up 3-State * Live insertion/extraction permitted * No bus current loading when output is tied to 5V bus * Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model. resistors to hold unused inputs
DESCRIPTION
The LVT240 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal inverting buffer that is ideal for driving bus lines. The device features two Output Enables (1OE, 2OE), each controlling four of the 3-State outputs.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay nAx to nYx Input capacitance Output capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3.0V Outputs disabled; VO = 0V or 3.0V Outputs disabled; VCC = 3.6V TYPICAL 2.5 2.6 4 8 0.12 UNIT ns pF pF mA
ORDERING INFORMATION
PACKAGES 20-Pin Plastic SOL 20-Pin Plastic SSOP Type II 20-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT240 D 74LVT240 DB 74LVT240 PW NORTH AMERICA 74LVT240 D 74LVT240 DB 74LVT240PW DH DWG NUMBER SOT163-1 SOT339-1 SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER 2, 4, 6, 8 SYMBOL 1A0 - 1A3 2A0 - 2A3 1Y0 - 1Y3 2Y0 - 2Y3 1OE, 2OE GND VCC NAME AND FUNCTION Data inputs Data inputs Data outputs Data outputs Output enables Ground (0V) Positive supply voltage
1OE 1A0 2Y3 1A1 2Y2 1A2 2Y1 1A3 2Y0
1 2 3 4 5 6 7 8 9
20 19 18 17 16 15 14 13 12 11
VCC 2OE 1Y0 2A3 1Y1 2A2 1Y2 2A1 1Y3 2A0
11, 13, 15, 17 18, 16, 14, 12 9, 7, 5, 3 1, 19 10 20
GND 10
SV00006
1998 Feb 19
2
853-1744 18991
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
LOGIC SYMBOL
2 1A0 4 1A1 6 8 1A2 1A3 1Y0 1Y1 1Y2 1Y3 18 16 14 12
LOGIC SYMBOL (IEEE/IEC)
1
EN
2 4 6 8
18 16 14 12
1 1OE 11 13 2A0 2A1 2Y0 9 2Y1 2Y2 2Y3 7 5 3
19
EN
15 2A2 17 2A3 19 2OE
11 13 15 17
9 7 5 3
SV00007
SV00008
FUNCTION TABLE
INPUTS nOE L L H L X Z = = = = nAx L H OUTPUTS nYx H L Z
H X High voltage level Low voltage level Don't care High impedance "Off" state
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC VI VOUT IO OUT IIK IOK Tstg PARAMETER DC supply voltage DC input voltage3 DC output voltage3 DC output current Output in High state DC input diode current DC output diode current Storage temperature range VI < 0 VO < 0 -64 -50 -50 -65 to 150 mA mA C Output in Off or High state Output in Low state CONDITIONS RATING -0.5 to +4.6 -0.5 to +7.0 -0.5 to +7.0 128 mA UNIT V V V
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%; f 1kHz Input transition rise or fall rate; outputs enabled Operating free-air temperature range -40 PARAMETER LIMITS MIN 2.7 0 2.0 0.8 -32 32 64 10 +85 MAX 3.6 5.5 UNIT V V V V mA mA ns/V C
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL VIK VOH PARAMETER Input clamp voltage High-level output voltage TEST CONDITIONS VCC = 2.7V; II = -18mA VCC = 2.7 to 3.6V; IOH = -100A VCC = 2.7V; IOH = -8mA VCC = 3V; IOH = -32mA VCC = 2.7V; IOL = 100A VCC = 2.7V; IOL = 24mA VOL Low-level output voltage VCC = 3V; IOL = 16mA VCC = 3V; IOL = 32mA VCC = 3V; IOL = 64mA VCC = 0 or 3.6V; VI = 5.5V II Input leakage current In ut VCC = 3.6V; VI = VCC or GND VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF IHOLD Output off current Bus Hold current A in uts inputsNO TAG Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output High current 3-State output Low current Quiescent supply current VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC Additional supply current per input pin2 VO = 5.5V; VCC = 3.0V VCC = 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 3.6V; VO = 3.0V VCC = 3.6V; VO = 0.5V VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 0NO TAG VCC = 3.0 to 3.6V; One input at VCC -0.6V; Other inputs at VCC or GND 75 -75 500 60 1 1 -1 0.12 3 0.12 0.1 125 100 5 -5 0.19 12 0.19 0.2 mA mA A A A A Control pins Data pins4 ins VCC-0.2 2.4 2 Tamb = -40C to +85C MIN TYP1 0.9 VCC-0.1 2.5 2.2 0.1 0.3 0.25 0.3 0.4 1 0.1 0.1 -1 1 150 -150 A 0.2 0.5 0.4 0.5 0.55 10 1 1 -5 100 A A V MAX -1.2 V V V V UNIT
NOTES: 1. All typical values are at Tamb = 25C. 2. This is the increase in supply current for each input at VCC -0.6V. 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V 10% a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C, only. 4. Unused pins at VCC or GND 5. ICCZ is measured with outputs pulled to VCC or GND. 6. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 4
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500;Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM Tamb = -40C to +85C VCC = +3.3V 0.3V MIN tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay nAx to nYx Output enable time to High and Low level Output disable time from High and Low level 1 2 2 1 1 1 1 2 1.6 TYP1 2.5 2.5 3.7 3.1 3.4 3.2 MAX 4.3 4.3 5.2 5.2 5.6 5.1 VCC = 2.7V MAX 5.2 5.0 6.3 6.7 6.3 5.6 ns ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C.
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
VIN
VIN
nOE INPUT nAx INPUT VM VM
VMI
VMI 0V
tPZL tPHL tPLH nYx OUTPUT nYx OUTPUT VM VM VMO
tPLZ
3.0V
VOL + 0.3V tPZH tPHZ VOL VOH nYx OUTPUT VMO VOH - 0.3V
SA00037
Waveform 1. Input (nAx) to Output (nYx) Propagation Delays
0V
SV00104
Waveform 2. 3-State Output Enable and Disable Times
1998 Feb 19
5
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
TEST CIRCUIT AND WAVEFORMS
VCC 6.0V Open VIN PULSE GENERATOR RT D.U.T. CL RL tTHL (tF) tTLH (tR) VOUT RL GND tW VM 10% 10% 0V tTLH (tR) tTHL (tF) 90% VM 10% tW 0V AMP (V) VM AMP (V)
90% NEGATIVE PULSE
90%
Test Circuit for 3-State Outputs
90% POSITIVE PULSE 10% VM
SWITCH POSITION
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH SWITCH Open 6V GND
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate v10MHz tW tR tF
500ns v2.5ns v2.5ns
SV00092
1998 Feb 19
6
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1998 Feb 19
7
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
1998 Feb 19
8
Philips Semiconductors
Product specification
3.3V Octal inverting buffer (3-State)
74LVT240
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
1998 Feb 19
9
Philips Semiconductors
Product specification
74LVT240
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03806
Philips Semiconductors
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